This illustrates a good use of our Tee Scratchpad (below). A processor which is also accessible in the Piping Input Processor.
In terms of stress intensification, it's pretty much a toss-up. They are similar (using my assumptions).
You should be able to match the SIF formulae in Appx. D to what CAESAR II shows.
If you are calculating Code stress by hand, remember to consider the "effective section modulus" (Ze) for reduced outlet intersections.